BE disassembler extension for Z80

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What it does

BEZ80 is a 'disassembler extension' which provides Andys Binary Folding Editor with the capability to disassemble Zilog Z80 opcodes.

BEZ80 offers full symbolic disassembly of the Z80 instruction set.

It identifies branches (and potential references) to other routines, and allows the user to use the c key in BE to disassemble from there. rst instructions reference their restart addresses.

It identifies simple potential data references, and allows the use of the * key in BE to show a definition from there.

BEZ80 has a selection of user-configurable options, all with sensible defaults.


be -A 16 -C z80 dump.ram


Here is a little bit of code which initialises the VDP chip in the Z80 based Memotech MTX computer, stolen from the SMG (Scrolling Maze Game) game code.

Pressing c takes us to the function that writes one particular register.

I lost the assembler source code to this game years ago. But with BEZ80, one day I'll reverse engineer it.

Options supported

BE allows you to pass user options to the disassembler via the D key. It then prompts you for the option.

BEZ80 supports the following options :-

sym or nosym
Enables or disables the use of the symbol table, if BE has one loaded.
op or noop
Enables or disables the display of the opcodes before the disassembled instructions.
ill or noill
If illegal instructions are decoded, this enables the display of diagnostic information. For example, an instruction with the 0xdd IX prefix, which doesn't support the use of this prefix.
mtx or nomtx
Disassemble some Memotech specific instructions (rst instructions, with inline data following).

Options may be specified several at once, seperated by spaces and/or commas.

When BEZ80 is loaded, the options are sym, op, ill and nomtx.

Illegal instructions

Here are the explanations of the diagnostics you might see appended to instructions decoded by this disassembler :-

Instruction has 0xdd or 0xfd IX or IY prefix, and yet isn't one of the instructions which supports the use of these registers.
Instruction appears to fit into the shift/rotate group, but isn't one of rlc, rrc, rl, rr, sla, sra or srl.
There is a shorter (fewer opcodes, and quicker too) way of representing this instruction.
This instruction cannot have two memory operands.

This documentation is written and maintained by the BEZ80 author, Andy Key