The Memotech Memory Map is a complicated thing, populated to various degrees in various systems, to varying degrees of quality.
We assign each physical 16KB of memory a letter. Greek letters, then lower-case, then upper-case.
We can then talk about which physical page we expect to see when setting RELCPMH, P3,P2,P1,P0 and A15,A14 to particular values :-
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MEMMAP.RUN and MEMMAPC.COM are simple
programs to stab each possible memory page with a distinct value,
and then read them back to see where the memory actually is.
From CP/M :-
A>MEMMAPC
From MTX BASIC :-
ROM 5 USER RUN "MEMMAP.RUN"
Memory has now been corrupted, so power off your system.
Send the generated .OUT file to me,
or perhaps you'd like to interpret it, using the information below.
Both programs do the same thing. I only bother to supply two variants, in case you don't have CP/M, or you don't have the SDX feature.
The programs make 4 passes :-
PRINT PEEK(64122).
The logic of the program is as follows :-
for relcpmh_w,relcpmh_r in 0,0 1,1 1,0 0,1
for page in 0 to 15
set iobyte to relcpmh_w*080H+page
for address in 0000H,04000H,08000H,0C000H
mem[address] = page*4+address/04000H
for page in 0 to 15
set iobyte to relcpmh_r*080H+page
for address in 0000H,04000H,08000H,0C000H
write mem[address] to disk
MEMMAP.RUN and MEMMAPC.COM produce
either MEMMAP.OUT or MEMMAPC.OUT files.
Although the names differ, the content is in the same format.
Interpreting the files is a little messy, so I use my Binary Editor. This editor is a very powerful tool, but we are only using a small part of its functionality here
eg:
$ be -i memmap.ini MEMMAPC.OUT
Enter then + will select and expand the first section, to show something like this :-
elements of write RELCPMH=0 read RELCPMH=0 at 0x00000000 0/16 1 2
q, Esc, p, f, i,x, S, r,R, A,O,L,I, @, +,-, t, w, Enter
more detail
[0x000] : {rom ,gamma,beta ,alpha}
[0x001] : {rom ,0xff ,delta,alpha}
[0x002] : {rom ,0xff ,0xff ,alpha}
[0x003] : {rom ,0xff ,0xff ,alpha}
[0x004] : {rom ,0xff ,0xff ,alpha}
[0x005] : {rom ,0xff ,0xff ,alpha}
[0x006] : {rom ,0xff ,0xff ,alpha}
[0x007] : {rom ,0xff ,0xff ,alpha}
[0x008] : {rom ,0xff ,0xff ,alpha}
[0x009] : {rom ,0xff ,0xff ,alpha}
[0x00a] : {rom ,0xff ,0xff ,alpha}
[0x00b] : {rom ,0xff ,0xff ,alpha}
[0x00c] : {rom ,0xff ,0xff ,alpha}
[0x00d] : {rom ,0xff ,0xff ,alpha}
[0x00e] : {rom ,0xff ,0xff ,alpha}
[0x00f] : {rom ,0xff ,0xff ,alpha}
Esc takes you back, where you can scroll down to another section, and select and expand that too.
q to quit the editor.
Rather than use the full text quoted above, here I'll remove redundant text.
A typical MTX512, or MEMU with default settings, will look like this :-
elements of write RELCPMH=0 read RELCPMH=0
[0x000] : {rom ,gamma,beta ,alpha}
[0x001] : {rom ,0xff ,delta,alpha}
[0x002] : {rom ,0xff ,0xff ,alpha}
...
elements of write RELCPMH=1 read RELCPMH=1
[0x000] : {delta,gamma,beta ,alpha}
[0x001] : {0xff ,0xff ,0xff ,alpha}
[0x002] : {0xff ,0xff ,0xff ,alpha}
...
elements of write RELCPMH=1 read RELCPMH=0
[0x000] : {rom ,gamma,beta ,alpha}
[0x001] : {rom ,0xff ,delta,alpha}
[0x002] : {rom ,0xff ,0xff ,alpha}
...
elements of write RELCPMH=0 read RELCPMH=1
[0x000] : {delta,gamma,beta ,alpha}
[0x001] : {0xff ,0xff ,0xff ,alpha}
[0x002] : {0xff ,0xff ,0xff ,alpha}
...
The 0xff values might be something else.
There is no memory at these locations.
An MTX512 with a 512KB RAM card,
or MEMU with the -mem-blocks 36 option,
would look like this :-
elements of write RELCPMH=0 read RELCPMH=0
[0x000] : {rom ,gamma,beta ,alpha}
[0x001] : {rom ,a ,delta,alpha}
[0x002] : {rom ,c ,b ,alpha}
[0x003] : {rom ,e ,d ,alpha}
[0x004] : {rom ,g ,f ,alpha}
[0x005] : {rom ,i ,h ,alpha}
[0x006] : {rom ,k ,j ,alpha}
[0x007] : {rom ,m ,l ,alpha}
[0x008] : {rom ,o ,n ,alpha}
[0x009] : {rom ,q ,p ,alpha}
[0x00a] : {rom ,s ,r ,alpha}
[0x00b] : {rom ,u ,t ,alpha}
[0x00c] : {rom ,w ,v ,alpha}
[0x00d] : {rom ,y ,x ,alpha}
[0x00e] : {rom ,A ,z ,alpha}
[0x00f] : {rom ,C ,B ,alpha}
note: pages D, E and F are not visible
elements of write RELCPMH=1 read RELCPMH=1
[0x000] : {delta,gamma,beta ,alpha}
[0x001] : {a ,b ,c ,alpha}
[0x002] : {d ,e ,f ,alpha}
[0x003] : {g ,h ,i ,alpha}
[0x004] : {j ,k ,l ,alpha}
[0x005] : {m ,n ,o ,alpha}
[0x006] : {p ,q ,r ,alpha}
[0x007] : {s ,t ,u ,alpha}
[0x008] : {v ,w ,x ,alpha}
[0x009] : {y ,z ,A ,alpha}
[0x00a] : {B ,C ,D ,alpha}
[0x00b] : {E ,F ,0xff ,alpha}
[0x00c] : {0xff ,0xff ,0xff ,alpha}
[0x00d] : {0xff ,0xff ,0xff ,alpha}
[0x00e] : {0xff ,0xff ,0xff ,alpha}
[0x00f] : {0xff ,0xff ,0xff ,alpha}
elements of write RELCPMH=1 read RELCPMH=0
[0x000] : {rom ,gamma,beta ,alpha}
[0x001] : {rom ,a ,delta,alpha}
[0x002] : {rom ,c ,b ,alpha}
[0x003] : {rom ,e ,d ,alpha}
[0x004] : {rom ,g ,f ,alpha}
[0x005] : {rom ,i ,h ,alpha}
[0x006] : {rom ,k ,j ,alpha}
[0x007] : {rom ,m ,l ,alpha}
[0x008] : {rom ,o ,n ,alpha}
[0x009] : {rom ,q ,p ,alpha}
[0x00a] : {rom ,s ,r ,alpha}
[0x00b] : {rom ,u ,t ,alpha}
[0x00c] : {rom ,w ,v ,alpha}
[0x00d] : {rom ,y ,x ,alpha}
[0x00e] : {rom ,A ,z ,alpha}
[0x00f] : {rom ,C ,B ,alpha}
elements of write RELCPMH=0 read RELCPMH=1
[0x000] : {delta,gamma,beta ,alpha}
[0x001] : {a ,b ,c ,alpha}
[0x002] : {d ,e ,f ,alpha}
[0x003] : {g ,h ,i ,alpha}
[0x004] : {j ,k ,l ,alpha}
[0x005] : {m ,n ,o ,alpha}
[0x006] : {p ,q ,r ,alpha}
[0x007] : {s ,t ,u ,alpha}
[0x008] : {v ,w ,x ,alpha}
[0x009] : {y ,z ,A ,alpha}
[0x00a] : {B ,C ,r ,alpha} note: the write in RELCPMH=0 could
[0x00b] : {0x2c ,u ,0xff ,alpha} not have written to pages D, E, F,
[0x00c] : {0xff ,0xff ,0xff ,alpha} so instead we see junk (r, 0x2c, u)
[0x00d] : {0xff ,0xff ,0xff ,alpha}
[0x00e] : {0xff ,0xff ,0xff ,alpha}
[0x00f] : {0xff ,0xff ,0xff ,alpha}
In a MTX512 S2, there is 256KB on the motherboard, but limitations of address decode PAL and the yellow wiring mean that the δ page doesn't work as described as above. RELCPMH=0 mode, RAM Page 1, addresses 08000H-0BFFFH actually accesses page c.
This means that programs that rely on the page "moving" don't work. An example of this is LOADMTX.
REMEMOTECH has 64KB base memory (α, β, γ and δ) plus 320KB memory (pages a to t) for RAM Disc.
In addition, RAM Page 14 and 15 provide windows onto the on-chip REBOOT code, the whole 512KB of SRAM and the whole 4MB of Flash memory :-
elements of write RELCPMH=0 read RELCPMH=0
[0x000] : {rom ,gamma,beta ,alpha}
[0x001] : {rom ,a ,delta,alpha}
[0x002] : {rom ,c ,b ,alpha}
[0x003] : {rom ,e ,d ,alpha}
[0x004] : {rom ,g ,f ,alpha}
[0x005] : {rom ,i ,h ,alpha}
[0x006] : {rom ,k ,j ,alpha}
[0x007] : {rom ,m ,l ,alpha}
[0x008] : {rom ,o ,n ,alpha}
[0x009] : {rom ,q ,p ,alpha}
[0x00a] : {rom ,s ,r ,alpha}
[0x00b] : {rom ,a ,t ,alpha} note: after page t, we get junk
[0x00c] : {rom ,a ,a ,alpha}
[0x00d] : {rom ,a ,a ,alpha}
[0x00e] : {rom ,A ,z ,alpha} note: RAM Page 14 is strange
[0x00f] : {A ,C ,delta,alpha} note: RAM Page 15 is strange
elements of write RELCPMH=1 read RELCPMH=1
[0x000] : {delta,gamma,beta ,alpha}
[0x001] : {a ,b ,c ,alpha}
[0x002] : {d ,e ,f ,alpha}
[0x003] : {g ,h ,i ,alpha}
[0x004] : {j ,k ,l ,alpha}
[0x005] : {m ,n ,o ,alpha}
[0x006] : {p ,q ,r ,alpha}
[0x007] : {s ,t ,b ,alpha} note: after page t, we get junk
[0x008] : {b ,b ,b ,alpha}
[0x009] : {b ,b ,b ,alpha}
[0x00a] : {b ,b ,b ,alpha}
[0x00b] : {b ,b ,b ,alpha}
[0x00c] : {b ,b ,b ,alpha}
[0x00d] : {b ,b ,b ,alpha}
[0x00e] : {b ,b ,b ,alpha}
[0x00f] : {rom ,0x3d ,delta,alpha} note: RAM Page 15 is strange
elements of write RELCPMH=1 read RELCPMH=0
[0x000] : {0x3d ,gamma,beta ,alpha}
[0x001] : {0x3d ,a ,delta,alpha}
[0x002] : {0x3d ,c ,b ,alpha}
[0x003] : {0x3d ,e ,d ,alpha}
[0x004] : {0x3d ,g ,f ,alpha}
[0x005] : {0x3d ,i ,h ,alpha}
[0x006] : {0x3d ,k ,j ,alpha}
[0x007] : {0x3d ,m ,l ,alpha}
[0x008] : {0x3d ,o ,n ,alpha}
[0x009] : {0x3d ,q ,p ,alpha}
[0x00a] : {0x3d ,s ,r ,alpha}
[0x00b] : {0x3d ,b ,t ,alpha} note: after page t, we get junk
[0x00c] : {0x3d ,b ,b ,alpha}
[0x00d] : {0x3d ,b ,b ,alpha}
[0x00e] : {0x3d ,0x3d ,t ,alpha} note: RAM Page 14 is strange
[0x00f] : {0x3d ,0x3d ,delta,alpha} note: RAM Page 15 is strange
elements of write RELCPMH=0 read RELCPMH=1
[0x000] : {delta,gamma,beta ,alpha}
[0x001] : {a ,b ,c ,alpha}
[0x002] : {d ,e ,f ,alpha}
[0x003] : {g ,h ,i ,alpha}
[0x004] : {j ,k ,l ,alpha}
[0x005] : {m ,n ,o ,alpha}
[0x006] : {p ,q ,r ,alpha}
[0x007] : {s ,z ,a ,alpha} note: after page t, we get junk
[0x008] : {a ,a ,a ,alpha}
[0x009] : {a ,a ,a ,alpha}
[0x00a] : {a ,a ,a ,alpha}
[0x00b] : {a ,a ,a ,alpha}
[0x00c] : {a ,a ,a ,alpha}
[0x00d] : {a ,a ,a ,alpha}
[0x00e] : {a ,a ,a ,alpha}
[0x00f] : {rom ,C ,delta,alpha} note: RAM Page 15 is strange
Why is the t replaced by z in the last table above? Its a quirk of the fact the same page of memory is written to more than the intended one time. This is because during this test, it just so happened that the special RAM Page 14 and 15 windows happen to alias to the same physical page.
A similar reason explains why we see 0x3d instead of the
word rom above also.
By quirk of the memory windows, we actually overwrote the first byte
of the OS ROM!
An MTX512 with an SDX with 512KB of RAM, should look something like this :-
elements of write RELCPMH=0 read RELCPMH=0
[0x000] : {rom ,gamma,beta ,alpha}
[0x001] : {rom ,0x7e ,delta,alpha}
[0x002] : {rom ,0x7e ,0x7e ,alpha}
...
elements of write RELCPMH=1 read RELCPMH=1
[0x000] : {delta,gamma,beta ,alpha}
[0x001] : {a ,b ,c ,alpha}
[0x002] : {d ,e ,f ,alpha}
[0x003] : {g ,h ,i ,alpha}
[0x004] : {j ,k ,l ,alpha}
[0x005] : {m ,n ,o ,alpha}
[0x006] : {p ,q ,r ,alpha}
[0x007] : {s ,t ,u ,alpha}
[0x008] : {v ,w ,x ,alpha}
[0x009] : {y ,z ,A ,alpha}
[0x00a] : {B ,C ,D ,alpha}
[0x00b] : {E ,F ,0x7e ,alpha}
[0x00c] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00d] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00e] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00f] : {0x7e ,0x7e ,0x7e ,alpha}
elements of write RELCPMH=1 read RELCPMH=0
[0x000] : {rom ,gamma,beta ,alpha}
[0x001] : {rom ,0x7e ,delta,alpha}
[0x002] : {rom ,0x7e ,0x7e ,alpha}
...
elements of write RELCPMH=0 read RELCPMH=1
[0x000] : {delta,gamma,beta ,alpha}
[0x001] : {0x4 ,a ,delta,alpha} note: write in RELCPMH=0 could only have
[0x002] : {0x8 ,c ,b ,alpha} written to alpha,beta,gamma,delta,
[0x003] : {0xc ,e ,d ,alpha} so the rest beyond here is junk
[0x004] : {0x10 ,g ,f ,alpha} left over from earlier tests
[0x005] : {0x14 ,i ,h ,alpha}
[0x006] : {0x18 ,k ,j ,alpha}
[0x007] : {0x1c ,m ,l ,alpha}
[0x008] : {0x20 ,o ,n ,alpha}
[0x009] : {0x24 ,q ,p ,alpha}
[0x00a] : {0x28 ,s ,r ,alpha}
[0x00b] : {0x2c ,u ,0x7e ,alpha}
[0x00c] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00d] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00e] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00f] : {0x7e ,0x7e ,0x7e ,alpha}
Bill and Pauls SDXs are like this.
Note that the extra memory is only visible in RELCPMH=1 mode. This is a pattern I have copied with my MTX Memory Card designs. No known MTX BASIC program needs the extra memory, but it is handy for CP/M to use as a RAM Disc. Only providing extra memory in one mode simplifies the logic, and avoids problems like the one that follows.
This is like an SDX except it makes more memory available in RELCPMH=0 mode :-
elements of write RELCPMH=0 read RELCPMH=0
[0x000] : {rom ,gamma,beta ,alpha}
[0x001] : {rom ,a ,delta,alpha}
[0x002] : {rom ,c ,b ,alpha}
[0x003] : {rom ,e ,d ,alpha}
[0x004] : {rom ,0x7e ,0x7e ,alpha}
...
elements of write RELCPMH=1 read RELCPMH=0
[0x000] : {rom ,gamma,beta ,alpha}
[0x001] : {rom ,b ,c ,alpha}
[0x002] : {rom ,e ,f ,alpha}
[0x003] : {rom ,h ,i ,alpha}
[0x004] : {rom ,0x7e ,0x7e ,alpha}
...
Note that this suffers from the usual MTX512 S2 affliction in that the pages don't move properly between RELCPMH=0 and RELCPMH=1 modes.
Note also that in principle you might expect to be able to get 208KB+512KB RAM in RELCPMH=1 mode, but in fact you get 64KB+512KB as with a regular SDX.
My one-off system has MTX500 motherboard plus an SDX with 512KB of RAM. It looks like this
elements of write RELCPMH=0 read RELCPMH=0
[0x000] : {rom ,gamma,beta ,alpha}
[0x001] : {rom ,a ,delta,alpha}
[0x002] : {rom ,c ,b ,alpha}
[0x003] : {rom ,e ,d ,alpha}
[0x004] : {rom ,g ,f ,alpha}
[0x005] : {rom ,i ,h ,alpha}
[0x006] : {rom ,k ,j ,alpha}
[0x007] : {rom ,m ,l ,alpha}
[0x008] : {rom ,o ,n ,alpha}
[0x009] : {rom ,q ,p ,alpha}
[0x00a] : {rom ,s ,r ,alpha}
[0x00b] : {rom ,u ,t ,alpha}
[0x00c] : {rom ,w ,v ,alpha}
[0x00d] : {rom ,y ,x ,alpha}
[0x00e] : {rom ,A ,z ,alpha}
[0x00f] : {rom ,0x7e ,B ,alpha} note: where are pages C and D ?
elements of write RELCPMH=1 read RELCPMH=1
[0x000] : {delta,gamma,beta ,alpha}
[0x001] : {a ,b ,c ,alpha}
[0x002] : {d ,e ,f ,alpha}
[0x003] : {g ,h ,i ,alpha}
[0x004] : {j ,k ,l ,alpha}
[0x005] : {m ,n ,o ,alpha}
[0x006] : {p ,q ,r ,alpha}
[0x007] : {s ,t ,u ,alpha}
[0x008] : {v ,w ,x ,alpha}
[0x009] : {y ,z ,A ,alpha} note: where are pages B, C and D ?
[0x00a] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00b] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00c] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00d] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00e] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00f] : {0x7e ,0x7e ,0x7e ,alpha}
elements of write RELCPMH=1 read RELCPMH=0
[0x000] : {rom ,gamma,beta ,alpha}
[0x001] : {rom ,a ,delta,alpha}
[0x002] : {rom ,c ,b ,alpha}
[0x003] : {rom ,e ,d ,alpha}
[0x004] : {rom ,g ,f ,alpha}
[0x005] : {rom ,h ,o ,alpha} note: what is page o doing here ?
[0x006] : {rom ,j ,i ,alpha}
[0x007] : {rom ,l ,k ,alpha}
[0x008] : {rom ,n ,m ,alpha}
[0x009] : {rom ,p ,o ,alpha} note: yes, o should sit between n and p
[0x00a] : {rom ,r ,q ,alpha}
[0x00b] : {rom ,t ,s ,alpha}
[0x00c] : {rom ,v ,u ,alpha}
[0x00d] : {rom ,x ,w ,alpha}
[0x00e] : {rom ,z ,y ,alpha}
[0x00f] : {rom ,0x7e ,A ,alpha}
elements of write RELCPMH=0 read RELCPMH=1
[0x000] : {delta,gamma,beta ,alpha}
[0x001] : {a ,b ,c ,alpha}
[0x002] : {d ,e ,f ,alpha}
[0x003] : {g ,i ,j ,alpha} note: why is page h missing ?
[0x004] : {k ,l ,m ,alpha}
[0x005] : {n ,o ,p ,alpha}
[0x006] : {q ,r ,s ,alpha}
[0x007] : {t ,u ,v ,alpha}
[0x008] : {w ,x ,y ,alpha}
[0x009] : {z ,A ,B ,alpha}
[0x00a] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00b] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00c] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00d] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00e] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00f] : {0x7e ,0x7e ,0x7e ,alpha}
Clearly there is an off-by-one error in the mapping from (P3,P2,P1,P0,A15,A14) to physical page number, in one of the RELCPMH modes.
None of the 32KB on the motherboard is actually being used.
Question: Are Memotech Business/2 systems similar? Or perhaps, do they have a different memory map to any presented here?
After doing the SDX Plus upgrade to my SDX, I get these results :-
elements of write RELCPMH=0 read RELCPMH=0
[0x000] : {rom ,gamma,beta ,alpha}
[0x001] : {rom ,0x7e ,delta,alpha}
[0x002] : {rom ,0x7e ,0x7e ,alpha}
[0x003] : {rom ,0x7e ,0x7e ,alpha}
[0x004] : {rom ,0x7e ,0x7e ,alpha}
[0x005] : {rom ,0x7e ,0x7e ,alpha}
[0x006] : {rom ,0x7e ,0x7e ,alpha}
[0x007] : {rom ,0x7e ,l ,alpha} note: page l holds virtual tape variables
[0x008] : {rom ,o ,0x7e ,alpha} note: page o aliases the alpha page
[0x009] : {rom ,q ,0x7e ,alpha}
[0x00a] : {rom ,s ,0x7e ,alpha}
[0x00b] : {rom ,u ,0x7e ,alpha}
[0x00c] : {rom ,w ,0x7e ,alpha}
[0x00d] : {rom ,y ,0x7e ,alpha}
[0x00e] : {rom ,A ,0x7e ,alpha}
[0x00f] : {rom ,C ,0x7e ,alpha} note: pages q,s,u,w,y,A,C hold virtual tape data
elements of write RELCPMH=1 read RELCPMH=1
[0x000] : {delta,gamma,beta ,alpha}
[0x001] : {a ,b ,c ,alpha} note: pages a-t for RAM Disc
[0x002] : {d ,e ,f ,alpha}
[0x003] : {g ,h ,i ,alpha}
[0x004] : {j ,k ,l ,alpha}
[0x005] : {m ,n ,o ,alpha}
[0x006] : {p ,q ,r ,alpha}
[0x007] : {s ,t ,u ,alpha} note: page u holds virtual tape variables
[0x008] : {0x7e ,0x7e ,0x7e ,alpha}
[0x009] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00a] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00b] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00c] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00d] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00e] : {0x7e ,0x7e ,0x7e ,alpha}
[0x00f] : {0x7e ,0x7e ,0x7e ,alpha}
elements of write RELCPMH=1 read RELCPMH=0
[0x000] : {rom ,gamma,beta ,alpha}
[0x001] : {rom ,0x7e ,delta,alpha}
...
elements of write RELCPMH=0 read RELCPMH=1
[0x000] : {delta,gamma,beta ,alpha}
[0x001] : {0x4 ,a ,delta,alpha}
...
I don't show much of the last two sections, as other than the delta page (which really ought to move for compatability reasons), the other pages don't move between modes.
So this model is more like a normal SDX in that pages intended for use as RAM Disc are only visible in RELCPMH=1 mode.
It also has virtual tape data pages that are only visible in RELCPMH=0.
Virtual tape variables are always visible, in the same place.
The alpha page aliases RELCPMH=1, RAM Page 8, 04000H-07FFFH.
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